The present invention relates in general to communication systems and components, and is particularly directed to a new and improved precision, low power operational amplifier that employs a transconductance amplifier architecture of the type described in my above-referenced ""408 application, and is configured to enjoy a wide operational bandwidth at any closed looped gain, while at the same time maintaining DC precision.
As described in the above-referenced ""408 application, the transmission channels of subscriber line interface circuits, or SLICs, employed by telecommunication service providers include a very demanding set of performance requirements, including accuracy, linearity, insensitivity to common mode signals, low power consumption, low noise, filtering, and ease of impedance matching programmability, to facilitate interfacing the SLIC with a variety of telecommunication circuits including those providing digital codec functionality. In a typical application, the length of the wireline pair to which a SLIC is connected can be expected to vary from installation to installation, may have a significant length (e.g., on the order of multiple miles), and is used to transport both substantial DC voltages, as well as AC signals (e.g., voice and/or ringing). As a consequence, it has been difficult to realize a SLIC implementation that has xe2x80x98universalxe2x80x99 use in both legacy and state of the art installations.
In accordance with the invention disclosed in the above-referenced ""408 application, such shortcomings of conventional transconductance amplifier circuits are effectively obviated by a new and improved transconductance amplifier circuit architecture, a schematic diagram of a non-limiting bipolar transitor-based implementation of which is shown in FIG. 1, and which is configured to transform a single ended input voltage into a very precise, single ended output current, without requiring a substantial quiescent current, and in a manner which is effectively independent of (differential) voltage supply rails through which the circuit is powered.
In FIG. 1, the transconductance amplifier circuit is shown as including an operational amplifier configured as a unity gain buffer 100. The operational amplifier has a dual polarity input operational amplifier input and gain stage 110, and a low output impedance, single ended output stage 120. The input and gain stage 110, which may have a conventional high impedance, moderate voltage gain circuit configuration, has a first, non-inverting polarity input 111, that is adapted to be coupled to a DC reference voltage, shown as a voltage v0 (relative to ground (GND)) , and a second, inverting polarity input 112, which is adapted to track the voltage v0. The input voltage v0 can be selected in compliance with the overhead voltages and power dissipation required by the specific application in which the transconductance amplifier circuit is employed.
The output stage 120 includes a differentially coupled transistor circuit pair, having a first, diode-connected NPN transistor 130, whose collector 131 and base 132 are connected in common to a first polarity output port 113 of the amplifier""s input stage 110. The emitter 133 of transistor 130 is coupled in common to the emitter 143 of a second, diode-connected PNP transistor 140. In a complementary fashion, PNP transistor 140 has its collector 141 and base 142 connected in common to a second polarity output port 114 of the amplifier input stage 110. The base 132 of NPN transistor 130 is coupled n common with the base 152 of an NPN transistor 150, the emitter 153 of which is coupled in common to the emitter 163 of a PNP transistor 160 and to an input/output node 123 of output stage 120.
The PNP transistor 160 has its base 162 coupled in common with the base 142 of the PNP transistor 140. The output stage has an input/output node 123 coupled in a follower configuration over a negative feedback path 126 to the inverting input 112 of the input stage 110. Unlike a conventional amplifier circuit, the input/output node 123, rather than being employed to supply an output current to a downstream load, is coupled to receive one or more input currents, respectively supplied through one or more coupling resistors, to associated voltage feed ports. In order to reduce the complexity of the drawing FIG. 1 shows a single input-coupling resistor R1 coupled between node 123 and an input port 125. With a voltage Vin applied to the input port 125, a current Iin will flow through input resistor R1.
The series-connected, collector-emitter current paths through the output transistors 150 and 160 of the amplifier""s output stage 120, rather than being biased via a direct coupling to respective (Vcc and Vee) voltage supply rails 155 and 156, are coupled in circuit with first current supply paths 171 and 181 of first and second current mirror circuits 170 and 180, respectively. These current mirror circuits serve to isolate the biasing of the amplifier""s output stage 120 from its power supply terminals, so that the output current produced at a single ended output node/port 135 can be accurately controlled independent of the values of the power supply voltages.
The current mirror circuit 170 includes a first PNP transistor 200 having its emitter 203 coupled to the (Vcc) voltage supply rail 155, and its base 202 coupled in common with the base 212 and collector 211 of a diode-connected current mirror PNP transistor 210, the emitter 213 of which is coupled to (Vcc) voltage supply rail 155. The current mirror transistor 200 supplies a mirrored output current to the current supply path 172 as a prescribed factor K of the current received by transistor 210 over the current supply path 171, in accordance with the ratio (1:K) of the geometries of the transistors 210/200. The collector 211 and base 212 of transistor 210 are coupled over the first current supply path 171 of the current mirror 170 to the collector 151 of transistor 150 of the output stage 120. The collector 201 of transistor 200 is coupled over a second current supply path 172 of the current mirror 170 to the transconductance stage""s single ended output node/ port 135.
The current mirror circuit 180 includes a first NPN transistor 220 having its emitter 223 coupled to the (Vee) voltage supply rail 156 and its base 222 coupled in common with the base 232 and collector 231 of a diode-connected current mirror NPN transistor 230, whose emitter 233 is coupled to (Vee) voltage supply rail 156. The collector 231 and base 232 of the current mirror transistor 230 are coupled over the first current supply path 181 of the current mirror 180 to the collector 161 of output stage transistor 160. The collector 221 of transistor 220 is coupled over a second current supply path 182 of the current mirror 180 to the output node 135. The current mirror transistor 220 provides a mirrored output current to current supply path 182 as a factor K of the current received by transistor 230 over current supply path 181, in accordance with the (1:K) ratio of the geometries of transistors 230/220.
An examination of current node equations (set forth below), that define the transfer function of the transconductance amplifier circuit of FIG. 1, reveals that it has a very wide dynamic range and is capable of accommodating single or multiple, differential polarity voltages applied at its one or more voltage feed ports. This wide dynamic range is obtained at a very low quiescent power dissipation.
More particularly, the single ended output current i123 delivered to input/output node 123 may be defined in equation (1) as:
i123=(v125xe2x88x921xe2x88x92v111)/R1xe2x80x83xe2x80x83(1)
The currents i171 and i181 supplied to current mirrors 170 and 180 may be related to the current i123 at the input/output node 123 by equation (2) as:
i123+i171=i181=xe2x86x92i123=i181xe2x88x92i171xe2x80x83xe2x80x83(2)
The currents i172 and i182 supplied by current mirrors 170 and 180 may be related to the current i135 at the output node 135 by equation (3):
i172+i135=i182xe2x80x83xe2x80x83(3)
and equation (4) as:
Ki171+i135=Ki181=xe2x86x92iout=i135=K(i181xe2x88x92i171)=Ki123xe2x80x83xe2x80x83(4)
Substituting equation (1) into equation (4) yields equation (5) as:
iout=K(v125=v111)/R1xe2x80x83xe2x80x83(5)
Equations (2) and (4) imply that transistor limitations due to beta and early voltage are compensated or minimized (in a manner not specifically shown in the diagrammatic illustration of FIG. 1). It may also be noted that if transistors 130/150 and 140/160 are matched pairs and the time average value of the input voltage is equal to zero, then the time average values of currents i171 and i181 are equal to the DC bias current IDC flowing in the emitter path of the output stage transistors 130-140. As a consequence, if the value of the bias current IDC is relatively low and the current mirror ratio K is equal to or less than 1, the quiescent power consumed by the transconductance amplifier circuit can be reduced to a very small value.
As described above, a particularly useful application of the transconductance amplifier circuit of FIG. 1 is a building block for one or more subcircuits, such as but not limited to those employed within a subscriber line interface circuit, or SLIC.
In accordance with the present invention, the transconductance amplifier circuit of my above-referenced ""408 application and shown in FIG. 1 described above, is used to realize a new and improved, precision, low power operational amplifier circuit having a wide operational bandwidth at any closed looped gain, while at the same time maintaining DC precision. This achieves a dual functionality not available from a conventional voltage feedback design, which exhibits an undesirable reduction in bandwidth as its closed loop gain increases, and a conventional current feedback design which, although not suffering from a reduction in bandwidth as does a voltage feedback design, lacks DC precision.
To this end, the single ended output node/port, to which the current paths of the first and second current mirrors of the transconductance amplifier architecture described above are coupled, is employed as a non-inverting terminal, and is coupled through a pair of complementary polarity oriented diodes to a reference terminal (e.g., ground). In addition, each of the first and second current mirror circuits includes an additional current mirror stage whose outputs are coupled to respective third and fourth auxiliary current mirror stages. The outputs of the third and fourth current mirrors are coupled in common to a further single ended xe2x80x98invertingxe2x80x99 output node/port, that is employed as an inverting terminal. Like the non-inverting terminal, the inverting input terminal is coupled through a pair of complementary polarity oriented diodes to a reference terminal (e.g., ground).
An output operational amplifier stage has its non-inverting input coupled to ground and its inverting input coupled to a feedback port. A gain-defining feedback resistor is coupled between the output and the feedback port of the output operational amplifier stage. The functionality of the operational amplifier circuit of the present invention is defined by selectively connecting the feedback port of the output amplifier stage to one of the non-inverting terminal and the inverting terminal, with the other of these two terminals being unconnected or open. The closed loop gain is the ratio of the gain-defining feedback resistor of the output amplifier stage and the input resistor to the transconductance amplifier stage.